1. Field of the Invention
The present invention relates to a semiconductor device formed by a circuit made from a thin film transistor (hereafter referred to as TFT) formed on a substrate, and a method of manufacturing thereof. In particular, the present invention relates to an insulating film formed between a semiconductor layer which is an active layer of the TFT, and the substrate. This kind of insulting film is referred to as a blocking layer or a base film. Along with obtaining good TFT characteristics, the present invention relates to a suitable insulating film structure for preventing deterioration of the TFT, and the method of its manufacture.
The semiconductor device of the present invention includes a display device having a TFT or a semiconductor circuit including TFTs, and an electro-optical device such as an image sensor. In addition, the semiconductor device of the present invention also includes electronic equipment loaded with these display devices and electro-optical devices as the category.
2. Description of the Related Art
Active matrix display devices in which thin film transistors (hereafter referred to as TFTs) having an active layer formed by a crystalline semiconductor layer are used as pixel switching elements, and used to form driver circuits, have been in the spotlight in recent years as a means of realizing a high definition, high image quality image display. A crystalline silicon layer, for example, in which an amorphous silicon layer is crystallized by a method such as laser annealing or thermal annealing, is suitably used as a crystalline semiconductor layer material. A TFT using a crystalline silicon layer can realize a high electric field effect mobility and has good current drive capabilities, and therefore fine processing becomes possible, and it becomes possible to improve the aperture ratio of the pixel portion.
In order to realize a large surface area, low cost display in this type of active matrix display device, the use of a glass substrate, having a lower cost than a quartz substrate, becomes a premise. Due to its heat resistance temperature, it is therefore necessary to set the maximum production temperature from 600 to 700xc2x0 C. or less. However, alkaline metals such as sodium (Na) are contained in the glass substrate in microscopic amounts. Consequently, it becomes necessary to form a blocking layer, made from a film such as a silicon oxide film or a silicon nitride film, on at least the surface of the substrate on which the TFTs are formed, so that the alkaline metal elements do not become mixed into the active layers of the TFTs.
Top gate type and bottom gate type (or inverse stagger type) structure is known structures for a TFT manufactured on a glass substrate. A top gate type structure is one in which at least a gate insulating film and a gate electrode are formed on the active layer on the side opposite that of the substrate. A blocking layer such as the one stated above is then formed on the face of the active layer opposite to the side contacting the gate insulating film (hereafter referred to as the back channel side in this specification for convenience).
TFT characteristics can be shown by typical parameters such as electric field effect mobility and threshold voltage (hereafter abbreviated to Vth). As shown in FIG. 23A in the graph of (drain current)xc2xd vs. gate voltage (hereafter abbreviated as Id and Vg, respectively), Vth can be found by extrapolating the straight line region to the Vg axis. Further, the relationship between the drain current and the gate voltage in the neighborhood or below, Vth is referred to as the sub-threshold characteristic, and is an important property for determining the TFT performance as a switching element. A sub-threshold coefficient (hereafter shortened to S value) is used as a constant showing the merit of the sub-threshold characteristic. As shown in FIG. 23B, when the sub-threshold characteristics are plotted on a semi-log graph, the S value is defined as the gate voltage required in order to have a change of one order of magnitude in the drain current. The smaller the S value is, the faster it is possible to operate the TFT, and the lower its power consumption becomes. Furthermore, in a shift register circuit formed in a driver circuit, if the S value is large (if the sub-threshold characteristics are poor), then charge loss occurs due to the leak current, and this causes a fatal operation fault.
It is good, then, for the sake of circuit operation, to set Vth at between 0.5 and 2.5 V for an n-channel TFT, and at between xe2x88x922.5 and xe2x88x920.5 V for a P-channel TFT, but if the active layer becomes one with n-type conductivity due to an unintentional cause, then Vth may shift to the order of xe2x88x924 to xe2x88x923 V. If this happens, then the n-channel TFT becomes in the on state even when the gate voltage is not applied, and the designed switching characteristics cannot be obtained. The circuit becomes impossible to operate.
In order to control the value of Vth, a method of doping an impurity element that imparts p-type conductivity into a channel forming region of the active layer, at a concentration about 1xc3x971016 and 5xc3x971017atoms/cm3, is employed. This type of measure is referred to as a channel dope, and is important in the manufacture processes of the TFT.
When voltage is applied to the gate electrode in a top gate type TFT, alkaline metal element within the glass substrate which have been ionized are drawn to the active layer side by the polarity of the voltage. If the quality of the blocking layer is poor, the ions then easily mix into the active layer, change the electrical characteristics of the TFT, and the reliability cannot be maintained over time.
If a silicon nitride film is used as the blocking layer, then the blocking effect of impurity ions is high, but there are many trap levels, and further, the internal stress is large. Therefore, there is a fear of problems developing with the TFT characteristics if a silicon nitride film is formed directly contacting the active layer. On the other hand, a silicon oxide film has a wider band gap than a silicon nitride film, has superior insulating characteristics, and has the advantage of few trap levels. However, a silicon oxide film has disadvantages of moisture absorbency, and a low blocking effect against impurity ions.
If this type of blocking layer is formed, and an amorphous semiconductor layer is formed thereon, and then formed into a crystalline semiconductor layer by laser annealing or thermal annealing, then the internal stress of the blocking layer changes. This imparts a warping of the crystalline semiconductor film, and even if the TFT is completed in this state, the electrical characteristics such as Vth and the S value will deviate from their intended values. As a result, it becomes impossible to operate the TFT at the desired voltage.
A channel dope is a method which is effective in controlling Vth, but if Vth shifts to the order of xe2x88x924 to xe2x88x923 V when a circuit such as a CMOS circuit is formed by forming both an n-channel TFT and a P-channel TFT on the same substrate, then it is difficult to control the Vth of both TFTs with one channel dope. In other words, in order to make the Vth of the n-channel TFT between 0.5 and 2.5 V, and the Vth of the P-channel TFT from xe2x88x922.5 to xe2x88x920.5 V, the amount of impurity element which must be added is not the same. If channel doping is performed twice, the number of process steps increases, and this is a cause of increases manufacturing costs.
An object of the present invention is to provide a TFT that can be manufactured without dispersion of TFT characteristics, typically Vth and the S value, and with stable characteristics, and to provide a method of manufacturing thereof. Another object of the invention is to provide an active matrix liquid crystal display device using this type of TFT.
In order to solve the above stated problems, a blocking layer is formed on the back channel side of the TFT from a laminate of a silicon oxynitride film (A) (also called xe2x80x9csilicon nitride oxidexe2x80x9d) manufactured from SiH4, NH3, and N2O, and a silicon oxynitride film (B) manufactured from SiH4 and N2O. By using this type of laminate silicon oxynitride film structure, contamination by alkaline metallic elements from the substrate can be prevented, and the impact of stress imparted to the TFT caused by internal stress can be relieved.
A method such as plasma CVD, reduced pressure CVD, or ECR-CVD is used as a method of manufacturing the silicon oxynitride films. SiH4, NH3, and N2O are used as raw material gasses. It is possible to regulate the composition ratios by controlling the amount of raw material gasses supplied, or by regulating parameters related to film deposition such as reaction pressure, discharge power, discharge frequency, and substrate temperature. NH3 is for supplementing the nitrification of the silicon oxynitride film, and the amount of nitrogen contained in the silicon oxynitride film can be effectively controlled by suitably regulating the amount of NH3.
The concentration of oxygen contained in the silicon oxynitride film (A) is made more than or equal to 20 atomic %, and less than or equal to 30 atomic %, while the concentration of nitrogen is made more than or equal to 20 atomic %, and less than or equal to 30 atomic %. Alternatively, the composition ratio of nitrogen with respect to oxygen is made more than or equal to 0.6, and less than or equal to 1.5. Further, the concentration of oxygen contained in the silicon oxynitride film (B) is made more than or equal to 55 atomic %, and less than or equal to 65 atomic %, while the concentration of nitrogen is made more than or equal to 1 atomic %, and less than or equal to 20 atomic %. Alternatively, the composition ratio of nitrogen with respect to oxygen is made more than or equal to 0.01, and less than or equal to 0.4. The concentration of hydrogen contained in the silicon oxynitride film (A) is made more than or equal to 10 atomic %, and less than or equal to 20 atomic %, while the concentration of hydrogen contained in the silicon oxynitride film (B) is made more than or equal to 0.1 atomic %, and less than or equal to 10 atomic %.
In order to improve the ability to block alkaline metallic elements, it is necessary to make the film dense by increasing the amount of nitrogen contained in the silicon oxynitride film. However, if the ratio of nitrogen contained in the silicon oxynitride film is raised, then the trap levels are increased, and further, the internal stress becomes large, so that it is not suitable to form the active layer directly contacting this film. A silicon oxynitride film having a different composition, in which the amount of nitrogen contained is less than the amount of oxygen contained, is formed.
Further, a blocking layer formed before amorphous semiconductor layer changes the internal stress around a crystallization step for the amorphous semiconductor layer. Considering the influence to a crystalline semiconductor layer, it is necessary to make the amount of change in internal stress small. In order to prepare a blocking layer having these characteristics, an appropriate range for the composition and the film thickness of the silicon oxynitride films is necessary, and the present invention discovers those values.
The alkaline metallic element blocking ability is achieved by the silicon oxynitride film (A) formed adhering to a glass substrate and with a thickness of 10 to 150 nm, preferably between 20 and 60 nm, and by the silicon oxynitride film (B) formed thereon with a thickness of 10 to 250 nm, preferably between 20 and 100 nm.
The silicon oxynitride film (A) is then set to a density of more than or equal to 8xc3x971022 atoms/cm3, and less than or equal to 2xc3x971023 atoms/cm3, and the silicon oxynitride film (B) is set to a density of more than or equal to 6xc3x971022 atoms/cm3, and less than or equal to 9xc3x971022 atoms/cm3. The etching rate of the silicon oxynitride film (A) by a mixed aqueous solution of 7.13% ammonium hydrogen fluoride (NH4HF2) and 15.4% ammonium fluoride (NH4F) at 20xc2x0 C. is between 60 and 70 nm/min (between 40 and 50 nm/min after heat treatment at 500xc2x0 C. for 1 hour and at 550xc2x0 C. for 4 hours), and the etching rate of the silicon oxynitride film (B) is between 110 and 130 nm/min (between 90 and 100 nm/min after heat treatment at 500xc2x0 C. for 1 hour and at 550xc2x0 C. for 4 hours). The etching rates defined here are values obtained by using an aqueous solution of 7.13% NH4HF2 and 15.4% NH4F as an etching solution at 20xc2x0 C.
The blocking layer is formed by laminating the silicon oxynitride film (A) and the silicon oxynitride film (B), and therefore it is necessary to consider the internal stresses of the laminate state, and the amount of change in internal stress around the crystallization step is set so as to be 1xc3x97104 Pa or less.